Self-aligned contact process for complementary field-effect integrated circuits
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United States of America Patent
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Feb 1, 1994
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N/A
app pub date -
Feb 28, 1992
filing date -
Feb 28, 1992
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Abstract
A method for making a NMOS self-aligned contact in CMOS circuits without an extra mask is described. The maskless contact technique makes use of the fact that the blanket N-type implant, self-aligned to exposed field-oxide edge, will not change the P+ diffusion to N-type. The net P+ concentration in the contact region is reduced slightly but does not degrade the PMOS device performance.
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