Importance

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Abstract

A circuit for interfacing between a digital-television circuit for producing pixel data for television images and a computer graphics display permits rapid scaling and positioning of live television images on the graphics display. In a preferred embodiment, the digital-television/computer-graphics interface circuit of the invention includes memory for storing a horizontal-scaling bit pattern and a vertical-scaling bit pattern. Such a preferred interface circuit is adapted to receive digital-television pixel data from the digital television circuit and, on a pixel-by-pixel basis depending on the state of corresponding bits in the horizontal-scaling bit pattern, to skip the pixel in the case of image contraction and to replicate the pixel in the case of image expansion. The preferred interface circuit is also adapted to receive digital-television pixel data on a television-line by television-line basis and, depending on the state of a corresponding bit of the vertical-scaling bit pattern, to skip the entire line of pixel data in the case of image contraction or to replicate the line in the case of image expansion. The interface circuit may include a hardware vector generator for generating scaling bit patterns in accordance with a procedure analogous to a vector-drawing procedure used in graphics displays, such as the 'Bresenham procedure.'

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First Claim