Microcoprocessor, memory management unit interface to support one or more coprocessors
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United States of America Patent
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Feb 1, 1994
Grant Date -
N/A
app pub date -
Jan 22, 1991
filing date -
Jan 22, 1991
priority date (Note) -
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Abstract
The invention comprises an interface for switching control of a memory management unit (MMU) between a central processing unit (CPU) having a register stack for storing data, and one or more coprocessors (COP) each having register stacks for storing data. The COP is operative when actuated to perform selected functions, not normally performed by the CPU, utilizing information in memory.
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