Nonvolatile semiconductor memory device

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United States of America Patent

PATENT NO 5287319
SERIAL NO

07704425

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Abstract

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In the normal selfrefresh mode, the timer output selection circuit selects the timer output of a longer cycle from the timer outputs generated by the internal timer circuit, and the selected timer output supplied as an operation activation signal for the selfrefresh operation. Using this long timer output, the selfrefresh operation of DRAM cells in the memory device is performed with a low operating current which allows the memory device to be backed up by a battery. When the selfrefresh mode is set before the store operation, the timer output of a short cycle is selected from the timer outputs generated by the internal timer circuit, and the short timer output is supplied as an operation activation signal for the selfrefresh operation. Using this short timer output, the selfrefresh operation of the volatile memory means is performed. Therefore, a drop in the potential of the volatile memory portions caused by a leakage current can be quickly compensated, thus ensuring that data can be correctly stored in the volatile memory means. In the selfrecall operation mode, the timer output of an medium cycle is selected from the timer outputs generated by the internal timer circuit, and the medium timer output is supplied as an operation activation signal for the selfcall operation. Since the selfrecall operation is performed using the medium timer output, the selfrecall operation is performed at a faster speed than the normal selfrefresh operation.

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Patent Owner(s)

Patent OwnerAddress
SHARP KABUSHIKI KAISHASAKAI-KU SAKAI-SHI OSAKA 590-8522

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukumoto, Katsumi Nara, JP 21 669

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