Process for forming low resistance aluminum plug in via electrically connected to overlying patterned metal layer for integrated circuit structures
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United States of America Patent
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-
Feb 22, 1994
Grant Date -
N/A
app pub date -
Aug 12, 1992
filing date -
Aug 12, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A process is described for forming an aluminum plug in a via in an insulating layer in an integrated circuit structure by first depositing a layer of aluminum over the insulating layer in a multistep deposition which will also result in filling the via with aluminum to form an aluminum plug therein, followed by removal of any additional aluminum formed over the surface of the insulating layer, and subsequent formation of one or more patterned conductive layers over the insulating surface which is in electrical communication with the underlying aluminum plug in the via. The one or more patterned conductive layers formed over the insulating surface are characterized by superior electrical properties over the aluminum layer initially deposited and then removed. A barrier layer may be first formed over exposed portions of the underlying integrated circuit structure at the bottom of the via before it is filled with aluminum.
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