
US Patent No: 5,292,558
Number of patents in Portfolio can not be more than 2000
Process for metal deposition for microelectronic interconnections
Stats
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Mar 8, 1994
Issued date -
Aug 8, 1991
filing date -
07/742,391
serial no -
Expired
status
Importance
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Abstract
A method for forming interconnections in microelectronic devices, including interconnections through small vias between different layers in the microelectronic devices include the spin coating of a film comprising a polyoxometalate and an organic material on the substrate. The film is optionally patterned by lithography, the polymer is removed, and the polyoxometalate is reduced to a metal layer. The metal layer may in one embodiment provide a nucleating zone for the deposition of metal.
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First Claim
Related Publications
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International Classification(s)
Cited Art
| Patent Info | (Count) | # Cites | Year |
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| 4,843,034 Fabrication of interlayer conductive paths in integrated circuits | 52 | 1988 | |
| 5,087,589 Selectively programmable interconnections in multilayer integrated circuits | 77 | 1989 | |
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| 5,026,666 Method of making integrated circuits having a planarized dielectric | 53 | 1989 | |
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| 4,914,052 Process for the formation of a functional deposited film containing groups III and V atoms by microwave plasma chemical vapor deposition process | 16 | 1989 | |
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| 4,865,873 Electroless deposition employing laser-patterned masking layer | 58 | 1987 | |
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| 4,694,138 Method of forming conductor path | 29 | 1984 | |