Memory system having two-level security system for enhanced protection against unauthorized access

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United States of America Patent

PATENT NO 5293610
SERIAL NO

07713046

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Abstract

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A memory system, having security against unauthorized accessing of the contents of the memory system, comprises a first alterable memory (6), a second non-alterable memory (14, 16) and a data bus (5) for allowing external access to data stored in the memory system during a test mode of operation. The first alterable memory (6) comprises an options register (10) having a security bit (SEC) which, when programmed to an active state, prevents external access to the data stored in the first alterable memory during the test mode. The first alterable memory (6) further comprises a first data memory (8) having at least one security byte (VALSEC) which, when programmed to a predetermined state, prevents external access to the data stored in both the first alterable memory (6) and the second non-alterable memory (14, 16) during the test mode.

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Patent Owner(s)

  • FREESCALE SEMICONDUCTOR, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Schwarz, Roland H Geneva, CH 3 93

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