High voltage transistor having reduced on-resistance
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United States of America Patent
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Mar 15, 1994
Grant Date -
N/A
app pub date -
Jul 31, 1992
filing date -
Jul 31, 1992
priority date (Note) -
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Abstract
A method for forming a plurality of surface conduction paths (33) in a conductive region (16) of a first conductivity type. A plurality of areas (17) of a second conductivity type are formed in the conductive region (16). The plurality of areas (17) deplete the conductive region (16) when a reverse bias voltage is placed across the conductive region (16) and the plurality of areas (17). Area of the conductive region (16) adjacent to each of the plurality of areas (17) form the plurality of surface conduction paths (33) for conducting current through the conductive region (16).
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