Method and apparatus for programming anti-fuse devices
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United States of America Patent
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Mar 15, 1994
Grant Date -
N/A
app pub date -
Aug 17, 1992
filing date -
Aug 17, 1992
priority date (Note) -
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Abstract
Improved apparatus and methods for programming anti-fuse devices utilized in programmable semiconductor chips are described. An anti-fuse device circuit is disclosed wherein an anti-fuse device is connected between two programming transistors, and each programming transistor is connected to a separate voltage supply bus and to a control bus network having, for example, a common control bus or separate control buses. Interconnection structures of anti-fuse devices can be formed and a targeted anti-fuse device can be programmed by connecting a programming voltage to the first associated supply bus, by connecting another voltage or ground potential to the second associated supply bus, and by turning on the appropriate control bus line or lines so that the programming transistors conduct to provide a voltage differential across the targeted anti-fuse device. Several anti-fuse device interconnection embodiments are discussed, and the choice of a particular scheme to use for fabricating a programmable chip is dependent on the desired design features and on ease of software implementation.
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