Distributed address decoding for bus structures
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United States of America Patent
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Mar 29, 1994
Grant Date -
N/A
app pub date -
Nov 12, 1992
filing date -
Nov 12, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and an apparatus decodes the address of a selected destination user in a time-distributed manner thereby allowing a faster bus cycle and providing earlier error detection. The method and system of the present invention provides for the distribution of the address decoding over two bus cycles, rather than one, so that a faster bus cycle is allowed. In addition, the present invention provides address decode circuitry within the bus arbitrator/controller so that address decoding and error detection can be performed in parallel with bus arbitration.
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