An equipment protection semiconductor integrated circuit
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United States of America Patent
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Apr 19, 1994
Grant Date -
N/A
app pub date -
Sep 8, 1992
filing date -
Dec 30, 1991
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A semiconductor integrated circuit is provided which can have a high holding current without the penalty of a high gate current. Such a circuit includes a PNPN device and junction bipolar transistor in which a further doped region of the same conductivity type as the transistor collector region and more heavily doped than the collector region prevents the devices affecting each other. The junction bipolar transistor has a current gain of at least 10 and base-collector and base-emitter junctions with reverse breakdown voltages of at least 50 volts. A PN diode can also be used in the circuit.
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