Bipolar ESD protection for integrated circuits

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United States of America Patent

PATENT NO 5304839
SERIAL NO

07847438

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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CMOS integrated circuit buffers typically use a dual-diode electrostatic discharge (ESD) protection technique. However, in some cases that technique inadvertently causes one of the diodes to conduct when a desired signal voltage is present on the bondpad, thereby clipping the desired signal. This occurs, for example, when an output buffer on an unpowered device is connected to an active bus, or when the input buffer of a 3 volt device receives a 5 volt signal. The present invention solves this problem by using a bipolar (e.g., pnp) protection transistor connected between the bondpad and a power supply bus (e.g., V.sub.SS). The base of the transistor is connected to the bondpad through a resistor that provides a time delay due to the R-C time constant that includes distributed capacitance. The time delay allows for a high conduction period, during which an ESD event is conducted through the bipolar transistor, thereby protecting the input or output buffer.

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Patent Owner(s)

  • AT&T BELL LABORATORIES;AT&T IPM CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Che-Tsung Allentown, PA 3 49
Gabara, Thaddeus J North Whitehall Township, Lehigh County, PA 31 840
Morris, Bernard L Allentown, PA 43 666
Smooha, Yehuda South Whitehall Township, Lehigh County, PA 36 609

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