Method of forming a nonvolatile stacked memory
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United States of America Patent
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Apr 26, 1994
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N/A
app pub date -
Jun 17, 1992
filing date -
Dec 21, 1988
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Abstract
A nonvolatile memory array has two or more stacked layers of memory cells (10). The bottom layer may comprise a planar, X-cell, or buried N++ FAMOS transistor array and the top layer preferably comprises a planar transistor array. An epitaxial silicon layer (36) provides the substrate for the second layer. The stacked layer structure allows a two-fold increase in memory density without scaling the device sizes.
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