Frame buffer, systems and methods
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United States of America Patent
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May 3, 1994
Grant Date -
N/A
app pub date -
Jun 28, 1991
filing date -
Jun 28, 1991
priority date (Note) -
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Abstract
A frame buffer is provided, including a plurality of input nodes and a plurality of multiplexing circuits. Each multiplexing circuit has a first input coupled to a respective input node. First control circuitry is provided for selectively coupling a second input of each multiplexer circuit to outputs of others of the multiplexing circuits. Second control circuitry is coupled to each multiplexing circuit for selecting between the first and second inputs.
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