Method and apparatus for performing high speed divide operations
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United States of America Patent
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May 10, 1994
Grant Date -
N/A
app pub date -
Dec 31, 1992
filing date -
Dec 31, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and circuit for calculating the quotient, and remainder terms of a division operation. The circuit includes a plurality of identical stages repeated for each binary bit of the dividend. Each stage receives a single data bit from the dividend, and two or more bits from the remainder terms created by the next more significant bit. The plurality of stages produce the quotient bit and remainder terms, based on the value of the divisor much more quickly than is possible using prior art techniques.
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