Apparatus for testing ATM channels

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United States of America Patent

PATENT NO 5313453
SERIAL NO

07854888

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Abstract

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A first form of an ATM channel testing apparatus tests an ATM channel by having a test cell detector in each switch to detect whether or not the switch appropriately switches a test cell generated by a test cell generating trunk. A second form of an ATM channel testing apparatus easily tests an ATM channel by having test cell generators provided for the respective input highways sequentially generating test cells including test cell identifying information and input highway identifying information, and having test cell checkers provided respectively for the output highways simply tally the test cells by the respective input highways. A third form of an ATM channel testing apparatus tests an ATM channel with less pieces of hardware by having turnaround parts in respective ordinary trunks sequentially turn around a test cell generated by a test cell generating trunk to be finally returned to the test cell generating trunk. A fourth form of an ATM channel testing apparatus tests an ATM channel by having a test cell checker provided for each of output highways to examine whether or not the test data carried in respective octets of the payloads in extracted test cells are of consecutive values.

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Patent Owner(s)

  • FUJITSU LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Aso, Yasuhiro Kawasaki, JP 19 775
Izawa, Naoyuki Kawasaki, JP 11 402
Kakuma, Satoshi Kawasaki, JP 47 2044
Murayama, Masami Kawasaki, JP 44 1119
Uchida, Yoshihiro Kawasaki, JP 87 1076
Yoshimura, Shuji Kawasaki, JP 26 1112

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