Bit aligned data block transfer method and apparatus
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 17, 1994
Grant Date -
N/A
app pub date -
Nov 23, 1990
filing date -
Nov 23, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The number of required clock periods in a bit aligned block transfer operation may be reduced by analyzing the logical relationship between source, destination and pattern operands prior to fetching these operands from memory. If the result of the raster operation can be determined without actually using the value of any of the operands, the result is provided without reading memory values. When the raster operation will have no effect on the existing destination operand, the write operation is also canceled.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully