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Abstract

A digital data processing apparatus includes a processing element that executes a process for generating requests for access to mapped data in a memory element. The apparatus also includes a fork/checkpoint-signalling element that generates 'new-process signals' which delineate new time intervals. The apparatus responds to data requests generated by the process before the first new-process signal by accessing a requested datum as stored in a first set in memory. An address space manager responds to certain requests, e.g., for write access, in subsequent intervals for copying the requested datum from the most recent set in which it is stored to the current interval and, thereafter, accessing that copy. The manager responds to other requests, e.g., those for read-type access, by accessing the requested datum in the most recent set in which it is stored. A fork element can create a second process that initially duplicates a first one and can initiate generation of a new-process signal in connection with creation of the second process.

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First Claim