Phase-locked loop

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United States of America Patent

PATENT NO 5315269
SERIAL NO

07922762

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Abstract

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A phase-locked loop according to the present invention includes first and second frequency demultipliers, and a plurality of phase/frequency detectors. The first and second frequency demultipliers divide frequency of first and second signals by a predetermined number. Each of the plurality of phase/frequency detectors compares two signals supplied from the first and second frequency demultipliers. In accordance with a comparison result of the plurality of phase/frequency detectors, phase of the second signal is adjusted to be synchronized with the first signal.

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Patent Owner(s)

Patent OwnerAddress
NEC ELECTRONICS CORPORATION1753 SHIMONUMABE NAKAHARA-KU KAWASAKI-SHI KANAGAWA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fujii, Takashi Tokyo, JP 341 4820

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