Memory module, method for control thereof and method for setting fault bit table for use therewith
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United States of America Patent
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May 24, 1994
Grant Date -
N/A
app pub date -
Aug 25, 1992
filing date -
Aug 29, 1991
priority date (Note) -
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Abstract
A memory module implementing a desired memory capacity by use of a plurality of memory chips. The memory module has a fault bit substituting device that compensates for fault bits detected in any of the memory chips. This improves the yield of the memory module and lowers the production costs thereof without recourse to expensive equipment such as wafer processors.
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