US Patent No: 5,315,558

Number of patents in Portfolio can not be more than 2000

Integrated circuit memory with non-binary array configuration

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Abstract

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Memory arrays of non-binary physical dimensions are disclosed. A novel addressing scheme provides that multiple word lines are activated in response to each received address code. Generally, at least two physical block rows containing blocks of an addressed logical block row are activated in response to each address. Block rows containing redundant blocks are activated in response to every address. In a specific embodiment, a 1 M-bit array arranged in 11 rows of blocks and 6 columns of blocks functions as an 8.times.8 block logical array, with two blocks available for redundancy. The availability of non-binary physical arrays affords a designer new flexibility in meeting packaging constraints and redundancy specifications.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
NXP B.V.EINDHOVEN3657

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hag, Ejaz U Sunnyvale, CA 2 97

Cited Art Landscape

Patent Info (Count) # Cites Year
 
FUJITSU LIMITED (1)
4,811,297 Boundary-free semiconductor memory device 21 1987
 
NEC CORPORATION (1)
4,918,662 Semiconductor memory device having redundant structure for segmented word line arrangement 44 1988

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (51)
7,102,671 Enhanced compact flash memory card 12 2000
6,978,342 Moving sectors within a block of information in a flash memory mass storage architecture 73 2000
6,646,913 Method for storing and reading data in a multilevel nonvolatile memory 60 2001
6,957,295 File management of one-time-programmable nonvolatile memory devices 52 2002
6,950,918 File management of one-time-programmable nonvolatile memory devices 50 2002
6,816,407 Method for storing and reading data in a multilevel nonvolatile memory, and architecture therefor 11 2002
7,340,581 Method of writing data to non-volatile memory 39 2002
7,254,724 Power management system 9 2002
7,185,208 Data processing 7 2002
7,000,064 Data handling system 46 2002
7,231,643 Image rescue system including direct communication between an application program and a device driver 5 2003
6,973,519 Card identification compatibility 53 2003
7,167,944 Block management for mass storage 13 2003
8,171,203 Faster write operations to nonvolatile memory using FSInfo sector manipulation 0 2003
7,111,140 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 34 2004
7,215,580 Non-volatile memory control 46 2004
7,464,306 Status of overall health of nonvolatile memory 13 2004
7,594,063 Storage capacity status 5 2004
7,275,686 Electronic equipment point-of-sale activation to avoid theft 0 2004
7,725,628 Direct secondary device interface by a host 33 2005
7,370,166 Secure portable storage device 16 2005
7,523,249 Direct logical block addressing flash memory mass storage architecture 9 2005
7,441,090 System and method for updating data sectors in a non-volatile memory using logical block addressing 17 2005
7,263,591 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 11 2006
7,549,013 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 13 2006
7,424,593 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 15 2006
7,734,862 Block management for mass storage 0 2007
8,166,488 Methods of directly accessing a mass storage data device 0 2007
7,944,762 Non-volatile memory control 9 2007
7,681,057 Power management of non-volatile memory systems 6 2007
8,386,695 Methods and apparatus for writing data to non-volatile memory 1 2008
7,865,659 Removable storage device 1 2008
7,908,426 Moving sectors within a block of information in a flash memory mass storage architecture 1 2008
7,743,290 Status of overall health of nonvolatile memory 0 2008
7,774,576 Direct logical block addressing flash memory mass storage architecture 0 2009
8,078,797 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 1 2009
7,949,822 Storage capacity status 1 2009
7,917,709 Memory system for data storage and retrieval 1 2009
8,090,886 Direct secondary device interface by a host 1 2010
8,019,932 Block management for mass storage 0 2010
8,032,694 Direct logical block addressing flash memory mass storage architecture 0 2010
8,151,041 Removable storage device 0 2010
8,554,985 Memory block identified by group of logical block addresses, storage device with movable sectors, and methods 0 2011
8,135,925 Methods of operating a memory system 0 2011
8,296,545 Storage capacity status 0 2011
8,208,322 Non-volatile memory control 0 2011
8,250,294 Block management for mass storage 0 2011
8,316,165 Direct secondary device interface by a host 0 2011
8,397,019 Memory for accessing multiple sectors of information substantially concurrently 0 2011
8,612,671 Removable devices 0 2012
8,694,722 Memory systems 0 2013
 
INTEL CORPORATION (3)
7,089,360 Shared cache wordline decoder for redundant and regular addresses 0 2000
6,507,531 Cache column multiplexing using redundant form addresses 1 2000
6,707,752 Tag design for cache access with redundant-form address 1 2001
 
SANDISK 3D LLC (3)
6,407,953 Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays 135 2001
6,889,307 Integrated circuit incorporating dual organization memory array 14 2001
6,768,685 Integrated circuit memory array with fast test mode utilizing multiple word line selection and method therefor 23 2001
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
6,021,512 Data processing system having memory sub-array redundancy and method therefor 17 1996
 
SPANSION ISRAEL LTD (1)
8,339,865 Non binary flash array architecture and method of operation 1 2008
 
STMICROELECTRONICS S.R.L. (1)
6,965,523 Multilevel memory device with memory cells storing non-power of two voltage levels 2 2004
 
TRACE STEP HOLDINGS, LLC (1)
5,854,763 Integrated circuit with non-binary decoding and data access 38 1997