Integrated circuit memory with non-binary array configuration

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5315558
SERIAL NO

08052143

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Memory arrays of non-binary physical dimensions are disclosed. A novel addressing scheme provides that multiple word lines are activated in response to each received address code. Generally, at least two physical block rows containing blocks of an addressed logical block row are activated in response to each address. Block rows containing redundant blocks are activated in response to every address. In a specific embodiment, a 1 M-bit array arranged in 11 rows of blocks and 6 columns of blocks functions as an 8.times.8 block logical array, with two blocks available for redundancy. The availability of non-binary physical arrays affords a designer new flexibility in meeting packaging constraints and redundancy specifications.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
NXP B.V.EINDHOVEN3124

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hag, Ejaz U Sunnyvale, CA 2 110

Cited Art Landscape

Patent Info (Count) # Cites Year
 
NEC CORPORATION (1)
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FUJITSU LIMITED (1)
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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

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* Cited By Examiner