US Patent No: 5,315,558

Number of patents in Portfolio can not be more than 2000

Integrated circuit memory with non-binary array configuration

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Abstract

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Memory arrays of non-binary physical dimensions are disclosed. A novel addressing scheme provides that multiple word lines are activated in response to each received address code. Generally, at least two physical block rows containing blocks of an addressed logical block row are activated in response to each address. Block rows containing redundant blocks are activated in response to every address. In a specific embodiment, a 1 M-bit array arranged in 11 rows of blocks and 6 columns of blocks functions as an 8.times.8 block logical array, with two blocks available for redundancy. The availability of non-binary physical arrays affords a designer new flexibility in meeting packaging constraints and redundancy specifications.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
NXP B.V.EINDHOVEN3706

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hag, Ejaz U Sunnyvale, CA 2 99

Cited Art Landscape

Patent Info (Count) # Cites Year
 
FUJITSU LIMITED (1)
4,811,297 Boundary-free semiconductor memory device 21 1987
 
NEC CORPORATION (1)
4,918,662 Semiconductor memory device having redundant structure for segmented word line arrangement 44 1988

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
MICRON TECHNOLOGY, INC. (52)
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6,816,407 Method for storing and reading data in a multilevel nonvolatile memory, and architecture therefor 13 2002
7,340,581 Method of writing data to non-volatile memory 47 2002
7,254,724 Power management system 9 2002
7,185,208 Data processing 7 2002
7,000,064 Data handling system 47 2002
7,231,643 Image rescue system including direct communication between an application program and a device driver 6 2003
6,973,519 Card identification compatibility 55 2003
7,167,944 Block management for mass storage 16 2003
8,171,203 Faster write operations to nonvolatile memory using FSInfo sector manipulation 1 2003
7,111,140 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 45 2004
7,215,580 Non-volatile memory control 51 2004
7,464,306 Status of overall health of nonvolatile memory 15 2004
7,594,063 Storage capacity status 7 2004
7,275,686 Electronic equipment point-of-sale activation to avoid theft 0 2004
7,725,628 Direct secondary device interface by a host 39 2005
7,370,166 Secure portable storage device 18 2005
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7,263,591 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices 14 2006
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7,734,862 Block management for mass storage 0 2007
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7,944,762 Non-volatile memory control 11 2007
7,681,057 Power management of non-volatile memory systems 7 2007
8,386,695 Methods and apparatus for writing data to non-volatile memory 1 2008
7,865,659 Removable storage device 1 2008
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7,949,822 Storage capacity status 1 2009
7,917,709 Memory system for data storage and retrieval 1 2009
8,090,886 Direct secondary device interface by a host 1 2010
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8,032,694 Direct logical block addressing flash memory mass storage architecture 0 2010
8,151,041 Removable storage device 0 2010
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8,135,925 Methods of operating a memory system 0 2011
8,296,545 Storage capacity status 0 2011
8,208,322 Non-volatile memory control 0 2011
8,250,294 Block management for mass storage 0 2011
8,316,165 Direct secondary device interface by a host 0 2011
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8,612,671 Removable devices 0 2012
8,694,722 Memory systems 0 2013
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INTEL CORPORATION (3)
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SANDISK 3D LLC (3)
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SPANSION ISRAEL LTD (1)
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TRACE STEP HOLDINGS, LLC (1)
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