Method for forming a metal wiring layer in a semiconductor device
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United States of America Patent
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Jun 7, 1994
Issued Date -
N/A
app pub date -
Jun 11, 1992
filing date -
Jul 3, 1990
priority date (Note) -
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Abstract
A method for forming a metal layer in a semiconductor device is disclosed. The method includes a first process for depositing a metal at an optional temperature after forming the pattern of a contact hole on the semiconductor substrate on which the stepped portion is formed, and a second process for annealing the deposited metal in a sputtering reaction chamber to fill up the contact hole with said metal. According to the invention, it is possible to completely fill up a contact hole having a high aspect ratio.
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