Device with host indication combination

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5319752
SERIAL NO

07947773

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Combined indication signals of data block transfers are generated by a device which reduces the number of interrupts to a host processor. The reduction in the number of interrupts enhances host system performance during data block transfers. An embodiment of the device may be a network adapter comprising network interface logic for transferring a data frame between a network and a buffer memory and host interface logic for transferring a data frame between a buffer memory and a host system. The network adapter further includes threshold logic for generating an early receive indication signal when a portion of the data frame is received. Indication combination logic delays the generation of a transfer complete interrupt to slightly before the expected occurrence of the early receive indication. The host processor is able to service both the transfer complete indication and the early receive indication in a single interrupt service routine caused by the transfer complete indication.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
U S ETHERNET INNOVATIONS LLC719 WEST FRONT STREET SUITE 122 TYLER TX 75702

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lo, Lai-Chin Campbell, CA 7 314
Petersen, Brian Los Altos, CA 52 1775

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation