FORTH specific language microprocessor
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United States of America Patent
Stats
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Jun 7, 1994
Issued Date -
N/A
app pub date -
Aug 16, 1991
filing date -
Nov 21, 1984
priority date (Note) -
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Abstract
A microprocessor for facilitating use of FORTH computer language includes a top register for storing a first parameter and an Arithmetic logic unit (ALU) connected to the top register for processing the first parameter with other parameters and for storing the results in the top register. An index register stores a second parameter and addresses main memory and pops and pushes the second parameter with respect to a return Last in/first out (LIFO) stack. A next parameter register stores a third parameter and pops andpushes the third parameter with respect to a next parameter LIFO stack. Anh addressing multiplexer is coupled to the index register and the next parameter register. A first swap connection to the top and index registers enables single cycle exchange of the first and second parameters between these two registers. A second swap connection between these registers permits a single cycle exchange of the first parameter and the third parameter between the top and next parameter registers. The memory, return LIFO, stack and next parameter LIFO stack comprise discrete and separate memory areas not accessible.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| INTERSIL CORPORATION | 2401 PALM BAY ROAD PALM BAY FL 32905 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Moore, Charles H | Woodside, CA | 75 | 789 |
| Murphy, Robert W | Scottsdale, AZ | 9 | 800 |
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| Fee | Large entity fee | small entity fee | micro entity fee |
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| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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