Translation buffer for virtual machines with address space match

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United States of America Patent

PATENT NO 5319760
SERIAL NO

07722869

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Abstract

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A central processing unit (CPU) executing a virtual memory management system employs a translation buffer for caching recently used page table entries. When more than one process is executing on the CPU, the translation buffer is usually flushed when a context switch is made, even though some of the entries would still be valid for commonly-referenced memory areas. An address space number feature is employed to allow entries to remain in the translation buffer for processes not currently executing, and the separate processes or the operating system can reuse entries in the translation buffer for such pages of memory that are commonly referenced. To allow this, an 'address space match' entry in the page table entry signals that the translation buffer content can be used when the address tag matches, even though the address space numbers do not necessarily match. When executing virtual machines on this CPU, with a virtual machine monitor, the address space match feature is employed among processes of a virtual machine, but an additional entry is provided to disable the address space match feature for all address space numbers for the virtual machine monitor.

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Patent Owner(s)

Patent OwnerAddress
HEWLETT-PACKARD DEVELOPMENT COMPANY L P10300 ENERGY DRIVE SPRING TX 77389

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hall, Judith S Sudbury, MA 2 339
Mason, Andrew H Hollis, NH 10 1204
Robinson, Paul T Arlington, MA 6 372
Witek, Richard T Littleton, MA 31 1391

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