Non-volatile semiconductor memory device having thin film memory transistors stacked over associated selecting transistors
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United States of America Patent
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Jun 14, 1994
Grant Date -
N/A
app pub date -
Nov 19, 1992
filing date -
Nov 26, 1991
priority date (Note) -
Expired
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Abstract
A electrically erasable and programmable read only memory device has a memory cell array implemented by a plurality of floating gate type memory transistors, and each of the floating gate type memory transistors is implemented by a thin film field effect transistor with a floating gate electrode formed on a relatively thick insulating film covering a major surface of a semiconductor substrate so that the biasing conditions and crystal defects do not have any influence on the floating gate type memory transistor.
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