Semiconductor wafer level package

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5323051
SERIAL NO

07807338

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Abstract

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A semiconductor wafer level package used to encapsulate a device fabricated on a semiconductor substrate wafer before dicing of the wafer into individual chips. A cap wafer is bonded to the semiconductor substrate wafer using a pre-patterned frit glass as a bonding agent such that the device is hermetically sealed inside a cavity. A hole in the cap wafer allows electrical connections to be made to the device through electrodes which pass through the frit glass seal.

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Patent Owner(s)

Patent OwnerAddress
FREESCALE SEMICONDUCTOR INC6501 WILLIAM CANNON DRIVE WEST AUSTIN TX 78735

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Adams, Victor J Tempe, AZ 13 455
Bennett, Paul T Phoenix, AZ 27 680
Hughes, Henry G Scottsdale, AZ 22 1013
Scofield, Jr Brooks L Tempe, AZ 2 193
Stuckey, Marilyn J Phoenix, AZ 3 186

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