Clock-synchronous semiconductor memory device and method for accessing the device
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 21, 1994
Grant Date -
N/A
app pub date -
Mar 1, 1993
filing date -
Mar 19, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method for accessing a clock-synchronous semiconductor memory device including memory cells arranged in matrix. The cells are divided into at least two blocks, access to the cells in these blocks is designated from address data provided from an external device, and access to the memory cell is executed synchronously with an externally-supplied clock signal, which comprises setting the other blocks in an access preparation state or in an access operation standby state while one block is in an access operating state, setting a certain block in the access operating state via the access preparation state when the certain block is designated for the access operation by the address data and if the certain block is in the access operating state, and setting a certain block in the access operating state immediately when the certain block is designated for the access operation by the address data and if the certain block is in the access preparation state or in the access operation standby state. In the device, the designation of the cell in the block to be accessed is set using address data designating a block externally-provided from outside of the device.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully