Importance

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Abstract

A transmitter pulse circuit produces two-phase pulse trains containing a certain number of pulse edges corresponding to an integral number represented by binary parallel bits of a data value to be transferred. The transmitter responds to a coordinate data value derived from a digitizer. The receiver includes a counter for counting pulse edges contained in the two-phase pulse trains, and a retrieving circuit for retrieving intermittently the counted contents to determine the number of received pulse edges. The counting circuit and the retrieving circuit constitute together a bus mouse interface of a host computer in the receiver. The coordinate data can be transferred to the host computer through the bus mouse interface without using a general RS-232C interface, thereby efficiently improving the host computer multiple terminal processing capacity.

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First Claim