Method for building multi-bit parallel Batcher/banyan networks

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United States of America Patent

PATENT NO 5327420
SERIAL NO

07887163

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Abstract

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A switch having a non-blocking, self-routing switching fabric for routing packets from the input ports to the output ports of the switching fabric in accordance with a virtual circuit designation and an output port address that is carried by each packet requires that the output port address for each of the packets being specified by the first few bits of a switch header that is appended to said packet. The switching fabric advantageously is composed of a plurality of parallel connected single bit wide sorting networks followed by a plurality of parallel connected routing networks for providing multi-bit wide data paths between its input ports and its output ports. Moreover, the switching fabric is constructed to have one multi-bit wide sorting network and a plurality of multi-bit wide routing networks for giving plural input ports simultaneous access to identical output ports. For that reason, the address bits for each of the packets are transmitted in bit parallel on all bits of said multi-bit wide data path, together with a prepended stopper ID that distinquishes each packet from any other packet that can be simultaneously routed to the same output port of said switching fabric, thereby preventing packets from different inputs from being intermingled at said output ports.

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Patent Owner(s)

Patent OwnerAddress
XEROX CORPORATION201 MERRITT 7 P O BOX 4505 NORWALK CT 06851-1056

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lyles, Joseph B Mountain View, CA 14 945

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