Two-level branch prediction cache
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United States of America Patent
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Jul 5, 1994
Issued Date -
N/A
app pub date -
Sep 30, 1992
filing date -
Feb 26, 1990
priority date (Note) -
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Abstract
An improved branch prediction cache (BPC) scheme that utilizes a hybrid cache structure. The BPC provides two levels of branch information caching. The fully associative first level BPC is a shallow but wide structure (36 32-byte entries), which caches full prediction information for a limited number of branch instructions. The second direct mapped level BPC is a deep but narrow structure (256 2-byte entries), which caches only partial prediction information, but does so for a much larger number of branch instructions. As each branch instruction is fetched and decoded, its address is used to perform parallel look-ups in the two branch prediction caches.
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