Method of controlling gate oxide thickness in the fabrication of semiconductor devices

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United States of America Patent

PATENT NO 5330920
SERIAL NO

08077570

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Abstract

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A method of controlling gate oxide thickness in the fabrication of semiconductor devices wherein a sacrificial gate oxide layer is formed on a semiconductor substrate surface. Nitrogens ions are implanted into select locations of the substrate through the sacrificial gate oxide layer, and the substrate and the gate oxide layer are then thermally annealed. The sacrificial gate oxide layer is then removed and a gate oxide layer is then formed on the substrate layer wherein the portion of the gate oxide layer formed on the nitrogen ion implanted portion of the substrate is thinner than the portion of the gate oxide layer formed on the non-nitrogen ion implanted portion.

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Patent Owner(s)

Patent OwnerAddress
HEWLETT-PACKARD DEVELOPMENT COMPANY L P10300 ENERGY DRIVE SPRING TX 77389

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Doyle, Brian S Framingham, MA 369 14648
Philipossian, Ara Redwood Shores, CA 36 607
Soleimani, Hamid R Westborough, MA 4 351

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