Device for processing the Viterbi algorithm comprising a processor and a dedicated operator

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United States of America Patent

PATENT NO 5331664
SERIAL NO

07791410

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Abstract

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A device for recovering an original bit stream from a received bit stream by processing the received bit stream in accordance with the Viterbi algorithm comprises an operator to establish the maximal metric of rank r of the state E.sub.j denoted Met.sub.r (E.sub.j) for r greater than n and the (r-n) th bit of the bit stream corresponding to the metric from input values which are maximal metrics of rank r-1 of states E.sub.2k and E.sub.2k+1 denoted Met.sub.r-1 (E.sub.2k) and Met.sub.r-1 (E.sub.2k+1) and the conditional probabilities related to the states E.sub.2k, E.sub.2k+1) that the r-th bit of the bit streams associated with these states has a determined value denoted (Pr(b(r)+0/E.sub.2k) and (Pr(b(r)=0/E.sub.2k+1) for example where k is equal to 2j for any value of j less than 2.sup.n-1 and has the value 2(j-2.sup.n-1) for any value of j greater than or equal to 2.sup.n-1, so that Met.sub.r (E.sub.j) takes the larger of the values of the expressions Met.sub.r (E.sub.j)+(Pr (b (r)=0/E.sub.2k) and Met.sub.r-1 (E.sub.2k+1)+(Pr (b (r)=0/E.sub.2k+1).

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Patent OwnerAddress
IPG ELECTRONICS 504 LIMITEDTRAFALGAR COURT LES BANQUES ST PETER PORT GY1 3DA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dartois, Luc Carrieres sous Poissy, FR 29 548
Desperben, Lydie Bois Colombes, FR 12 231
Rousseau, Emmanuel Paris, FR 7 96

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