Electrically erasable and programmable non-volatile semiconductor memory device having word line voltage control circuit using internal voltage booster circuit
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United States of America Patent
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-
Jul 26, 1994
Grant Date -
N/A
app pub date -
Nov 19, 1992
filing date -
Nov 29, 1991
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A flash memory is operable using a single power supply voltage. In this flash memory, an internal booster circuit boosts the supply voltage to generate a write voltage higher than the supply voltage. A row decoder is connected to word lines, which are connected to memory cells. Upon reception of an address signal, the row decoder selects a word line specified by this address signal. A row-line clamp circuit, which is connected to the internal booster circuit and the word lines, supplies the write voltage to a word line selected at the time of data writing, and drops the write voltage and supplies it to the selected word line at the time of write verify.
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