Automatic control of buffer speed
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United States of America Patent
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Aug 2, 1994
Grant Date -
N/A
app pub date -
Jan 13, 1993
filing date -
Jan 13, 1993
priority date (Note) -
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Abstract
The number of active switching elements in a buffer is automatically varied to compensate for variations in the manufacturing process, operating temperature, and power supply voltage. For this purpose, a reference voltage which is proportional to the speed of a switching transistor is applied to an analog-to-digital (A/D) converter. The A/D converter may be implemented with a simple resistor divider and comparators, all of which can be made on-chip. The resistor dividers are chosen such that at worst-case slow conditions all the comparators have high outputs. As the process/temperature/voltage changes, the reference voltage also increases. This successively turns off sections of the switching transistor, thereby slowing down the response of the buffer. Since the control leads are digital, they are not susceptible to noise as they are routed around a chip full of noisy signals. The digital control signals may be latched, and the control circuitry powered down to zero for powersensitive applications.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| CHASE MANHATTAN BANK AS ADMINISTRATIVE AGENT THE | P O BOX 2558 HOUSTON TX 77252 |
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Morris, Bernard L | Allentown, PA | 43 | 673 |
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