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Abstract

An expansion system for a bus-architecture system is disclosed, particularly for an SBus-compatible system. The expansion system includes a host expansion board which fits into one of the expansion slots connected to the SBus, a cable connected to the host expansion board, and an expansion chassis connected to the cable. A memory management unit is included in the host expansion board, for mapping physical addresses on said SBus into addresses of add-on functions installed in the expansion chassis. This mapping allows for varying memory size functions to be installed into a single expansion slot. The MMU also copies the ID PROMs from each of the add-on functions into RAM on the host expansion board, so that such expansion is transparent to the driver software. Latches and control functions are also provided so that one of the add-on functions can be the SBus DMA master within the timing specifications; this is enabled by initiating the DMA cycle early in the expansion chassis, and by latching the communicated states. The data and acknowledge signals can be synchronized with SBus, and succeeding data can be pipelined so that burst write DMA operations can be performed.

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First Claim