Method for implementing set/reset synchronously or asynchronously in a programmable logic device
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United States of America Patent
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Aug 9, 1994
Grant Date -
N/A
app pub date -
Oct 30, 1991
filing date -
Oct 30, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method is disclosed for allowing a user to enter a register symbol in a schematic diagram and attach to the register symbol both asynchronous and synchronous reset inputs. The method further provides for automatically generating an equivalent circuit from the register symbol. In one embodiment, the user may also specify a constant value (including don't are values) to be returned in response to the reset signal. In a preferred embodiment the user may specify values to be returned in response to both asynchronous and synchronous reset signals. In a preferred embodiment the user can specify a prioritized list of values for the synchronous reset control.
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