Non-volatile semiconductor memory device in which data can be erased on a block basis and method of erasing data on a block basis in non-volatile semiconductor memory device
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United States of America Patent
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Aug 9, 1994
Grant Date -
N/A
app pub date -
Sep 23, 1992
filing date -
Nov 7, 1991
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a flash EEPROM having source lines separately provided for memory cell array blocks, a Y decoder and a transfer control circuit are controlled in response to data supplied as a command indicating an erase mode so that a predetermined potential may only be supplied to a source line latch circuit provided corresponding to any one of the memory cell array blocks through a bit line in the one memory cell array block in the erase mode. Each source line latch circuit, in response to the predetermined potential, latches data instructing to supply a high potential to a source line in a corresponding memory cell array block. Accordingly, stored data in memory cell array can be erased on a block basis without increasing the number of interconnections and the circuit scale.
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