Video signals clamping circuit for maintaining DC level of video signals

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United States of America Patent

PATENT NO 5341218
SERIAL NO

07864679

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Abstract

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A video signal clamping circuit capable of maintaining a DC level of a digital video signal at a fixed level, in which a pedestal level in a vertical blanking period of the digital video signal after an A/D conversion is sampled, and an average value of a plurality of sampling data in a plurality of fields is calculated by an average value calculator. The average value is compared with a predetermined clamp level reference value by a comparison output circuit, and depending on the comparison result, a signal either added or subtracted by a certain width to or from an output signal of a predetermined period before is output for automatically controlling a clamp voltage.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHA2-3 MARUNOUCHI 2-CHOME CHIYODA-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Inoue, Sadayuki Nagaokakyo, JP 56 862
Kaneko, Hideki Nagaokakyo, JP 128 1415
Ookuma, Ikuo Nagaokakyo, JP 2 43

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