Method for wear leveling in a flash EEPROM memory
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United States of America Patent
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Aug 23, 1994
Issued Date -
N/A
app pub date -
Nov 1, 1993
filing date -
Oct 30, 1992
priority date (Note) -
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Abstract
In a process for cleaning up a flash EEPROM memory array separated into blocks which may be separately erased, in which process all valid data is first written to other blocks of the array, and then the block is erased, the improvement including the step of determining a block to clean up based on a comparison of the number of invalid sectors each block includes and the number of switching operations which each block has undergone.
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