Importance

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Abstract

Data recovery apparatus for receiving two channels of data signal portions skewed in time and recovering from them two data signal portions synchronized with a con, non clock signal. The apparatus includes a phase comparator circuit and a latch circuit associated with each channel of data signals, a single voltage controlled oscillator that generates a clock signal VCO-CLK in response to a VCO control signal and a single charge pumping circuit for generating the VCO control signal. Each phase comparator circuit receives its associated channel of data signal portions and the VCO-CLK signal and generates pump-up/pump-down signals applied to the charge pumping circuit. Each latch circuit is triggered by a selected edge of the VCO-CLK signal, so that the latch circuits respectively provide recovered data signal portions synchronized with the VCO-CLK signal, which may then be recombined in the same sequence as they were originally divided from a common high data-rate signal.

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First Claim