Analog calculation circuit using timers

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United States of America Patent

PATENT NO 5343419
SERIAL NO

07964157

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Abstract

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An analog calculation circuit has a circuit input for receiving a first input voltage, a circuit output, a first timer, and a second timer. The first timer has a first capacitive coupler, a first RC circuit, and a first threshold circuit for outputting a first timer output voltage. The first threshold circuit has a first threshold input terminal. The first capacitive coupler has a first capacitive coupler input connected to the circuit input, a second capacitive coupler input, and a first capacitive coupler output connected to the first threshold input terminal. The first RC circuit has a first resistance, a first capacitance, a first RC input for receiving a second input voltage, and a first RC output connected to the second capacitive coupler input. The second timer has a second RC circuit, a second threshold circuit for outputting a second timer output voltage to the second RC circuit, and for receiving the first timer output voltage. The second RC circuit has a second resistance, a second capacitance, a second RC input for receiving a third input voltage, and a second RC output connected to the circuit output. A third timer, similar in design to the first timer may also be used in the calculation circuit.

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Patent Owner(s)

Patent OwnerAddress
YOZAN INCTOKYO TOKYO METROPOLIS

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shu, Guoliang Tokyo, JP 2 5
Takatori, Sunao Tokyo, JP 151 1723
Wongwarawipat, Wiwat Tokyo, JP 5 7
Yamamoto, Makoto Tokyo, JP 297 3169
Yang, Weikang Tokyo, JP 30 268

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