Semiconductor memory device having equalization terminated in direct response to a change in word line signal
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United States of America Patent
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-
Aug 30, 1994
Grant Date -
N/A
app pub date -
Mar 14, 1991
filing date -
Mar 23, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor memory device includes an array of memory cells arranged in rows and columns; a plurality of word lines connected to the rows of the memory cells; a plurality of bit lines connected to the columns of the memory cells; word line selection means; bit line selection means; and equalizing means for equalizing the bit line to a desired voltage level in response to an address signal, and for terminating the equalization in response to change in a signal on a word line according to change in the address signal.
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