US Patent No: 5,345,566

Number of patents in Portfolio can not be more than 2000

Method and apparatus for controlling dual bus system

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Importance

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Abstract

A method and apparatus for controlling a dual bus system, capable of realizing high speed and continuous operation even if one of the buses of the dual bus system fails. The method and apparatus has a dual bus system, a plurality of electronic circuits connected to both buses of the dual bus system, and bus controller for providing a bus use allowance signal to one of the plurality of electronic circuits, the one electronic circuit being selected in accordance with bus occupation request signals issued from the plurality of electronic circuits requesting data transfer. If the bus occupation request signals for both buses of the dual bus system originates from the one selected electronic circuit and the outputs of the arbiters coincide, the bus use allowance signal is provided to the one selected electronic circuit for the allowance of occupying both buses of the dual bus system. A completion of data transfer at the dual bus system is determined when data transfer is completed at both buses. Continuous operation can be ensured immediately upon occurrence of a failure, and high speed operation of a computer system is possible.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
HITACHI, LTD.TOKYO32155

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukumaru, Hiroaki Hitachi, JP 10 179
Masui, Koji Ibaraki, JP 10 101
Miyazaki, Yoshihiro Hitachi, JP 23 419
Ogawa, Hisao Kanagawa-ken, JP 31 194
Tanji, Masayuki Hitachi, JP 10 188
Yamaguchi, Syoji Hitachi, JP 9 225

Cited Art

Patent Info (Count) # Cites Year
 
INTEL CORPORATION (3)
4,473,880 Arbitration means for controlling access to a bus shared by a number of modules 66 1982
4,503,534 Apparatus for redundant operation of modules in a multiprocessing system 39 1982
4,503,535 Apparatus for recovery from failures in a multiprocessing system 119 1982
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (2)
4,490,785 Dual path bus structure for computer interconnection 60 1982
4,607,365 Fault-tolerant communications controller system 51 1983
 
Bell Telephone Laboratories, Incorporated (1)
4,535,448 Dual bus communication system 78 1982
 
Honeywell Inc. (1)
4,982,321 Dual bus system 45 1987
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
4,495,569 Interrupt control for multiprocessor system with storage data controlling processor interrupted by devices 59 1982
 
NEC CORPORATION (1)
5,202,980 Information processing system capable of readily taking over processing of a faulty processor 38 1990
 
RADISYS CORPORATION (1)
4,484,273 Modular computer system 130 1982
 
Rational (1)
4,766,536 Computer bus apparatus with distributed arbitration 66 1987
 
ROCKWELL INTERNATIONAL CORPORATION (1)
4,245,344 Processing system with dual buses 121 1979
 
Sprint International Communications Corp. (1)
4,979,100 Communication processor for a packet-switched network 79 1988
 
Thomson-CSF Telephone (1)
4,511,959 Decentralized arbitration device for several processing units of a multiprocessor system 26 1981
 
UNITED TECHNOLOGIES CORPORATION (1)
4,695,952 Dual redundant bus interface circuit architecture 44 1984

Patent Citation Ranking

Forward Cites

Patent Info (Count) # Cites Year
 
ADVANCED MICRO DEVICES, INC. (8)
5,754,807 Computer system including a multimedia bus which utilizes a separate local expansion bus for addressing and control cycles 16 1995
5,682,484 System and method for transferring data streams simultaneously on multiple buses in a computer system 44 1995
5,805,840 Bus arbiter employing a transaction grading mechanism to dynamically vary arbitration priority 11 1996
5,802,330 Computer system including a plurality of real time peripheral devices having arbitration control feedback mechanisms 11 1996
5,740,387 Computer system having an expansion bus which includes normal and real time modes 30 1996
5,809,261 System and method for transferring data streams simultaneously on multiple buses in a computer system 23 1997
5,951,664 Computer system having a multimedia bus and including improved time slotting and bus allocation 71 1997
5,935,232 Variable latency and bandwidth communication pathways 19 1997
 
HITACHI, LTD. (8)
5,557,753 Information processing unit having a multiplexed bus and a bus control method therefor 6 1992
5,717,852 Multiple bus control method and a system thereof 6 1996
5,819,054 Storage system realizing scalability and fault tolerance 97 1997
6,012,119 Storage system 14 1998
6,578,100 Storage system having plural buses 7 1999
7,120,738 Storage system having data format conversion function 2 2001
6,581,128 Storage system 3 2001
7,444,467 Storage system having a semiconductor memory device which stores data and parity data permanently 1 2006
 
INTEL CORPORATION (6)
5,533,200 Method and apparatus for transmission of signals over a shared line 2 1994
5,619,726 Apparatus and method for performing arbitration and data transfer over multiple buses 29 1994
5,706,444 Method and apparatus for transmission of signals over a shared line 0 1996
5,974,488 Method and apparatus for transmission of signals over a shared line 3 1997
6,061,764 Coherent variable length reads which implicates multiple cache lines by a memory controller connected to a serial and a pipelined bus utilizing a plurality of atomic transactions 7 1998
6,298,420 Coherent variable length reads from system memory 10 2000
 
GLOBALFOUNDRIES INC. (5)
5,784,650 System for increasing multimedia performance and other real time applications by including a local expansion bus and a multimedia bus on the computer system motherboard 8 1995
5,778,200 Bus arbiter including aging factor counters to dynamically vary arbitration priority 27 1995
5,761,452 Bus arbiter method and system 21 1996
5,754,801 Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent data transfers 31 1996
5,905,879 System and method for transferring periodic data streams on a multimedia bus 19 1997
 
FREESCALE SEMICONDUCTOR, INC. (4)
6,505,290 Method and apparatus for interfacing a processor to a coprocessor 12 1997
6,327,647 Method and apparatus for interfacing a processor to a coprocessor 4 2000
7,007,154 Method and apparatus for interfacing a processor to a coprocessor 0 2001
7,099,973 Method and system of bus master arbitration 0 2003
 
APPLE INC. (3)
5,655,151 DMA controller having a plurality of DMA channels each having multiple register sets storing different information controlling respective data transfer 56 1994
5,828,856 Dual bus concurrent multi-channel direct memory access controller and method 49 1996
5,805,927 Direct memory access channel architecture and method for reception of network information 46 1997
 
STRATUS TECHNOLOGIES BERMUDA LTD. (3)
6,708,283 System and method for operating a system with redundant peripheral bus controllers 35 2000
6,691,257 Fault-tolerant maintenance bus protocol and method for using the same 6 2000
6,633,996 Fault-tolerant maintenance bus architecture 8 2000
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
5,636,361 Multi-processor computer system having dual memory subsytems for enabling concurrent memory access thereto by more than one processor 14 1994
6,430,641 Methods, arbiters, and computer program products that can improve the performance of a pipelined dual bus data processing system 6 1999
 
RENESAS ELECTRONICS CORPORATION (2)
5,608,881 Microcomputer system for accessing hierarchical buses 60 1993
6,249,833 Dual bus processing apparatus wherein second control means request access of first data bus from first control means while occupying second data bus 7 1998
 
AGERE SYSTEMS INC. (1)
5,577,230 Apparatus and method for computer processing using an enhanced Harvard architecture utilizing dual memory buses and the arbitration for data/instruction fetch 11 1994
 
ANALOG DEVICES, INC. (1)
6,618,777 Method and apparatus for communicating between multiple functional units in a computer environment 34 1999
 
CARNELIAN CORDLESS LLC (1)
5,784,547 Method for fault-tolerant communication under strictly real-time conditions 44 1996
 
CONEXANT SYSTEMS, INC. (1)
5,689,513 Data transmission system having a backup testing facility 6 1996
 
FRESENIUS MEDICAL CARE DEUTSCHLAND GMBH (1)
6,676,621 Blood treatment machine 4 1999
 
FUJITSU SIEMENS COMPUTERS LLC. (1)
5,787,095 Multiprocessor computer backlane bus 22 1997
 
HONEYWELL INTERNATIONAL INC. (1)
6,564,340 Fault tolerant virtual VMEbus backplane design 5 1999
 
Konrad Doppelmayr & Sohn Maschinenfabrik Gesellschaft m.b.H. & Co. KG (1)
5,452,662 Device for coupling a gondola or a chair to the overhead cable of a cableway system 2 1994
 
LSI LOGIC CORPORATION (1)
6,598,106 Dual-port SCSI sub-system with fail-over capabilities 21 1999
 
NATIONAL SEMICONDUCTOR CORPORATION (1)
5,734,850 Transparent bridge between of a computer system and a method of interfacing the buses to operate as a single logical bus 27 1995
 
NEC TOSHIBA SPACE SYSTEMS, LTD. (1)
6,334,194 Fault tolerant computer employing double-redundant structure 10 1998
 
RADISYS CORPORATION (1)
6,854,072 High availability file server for providing transparent access to all data before and after component failover 17 2001
 
UNISYS CORPORATION (1)
5,495,585 Programmable timing logic system for dual bus interface 15 1992
 
YAMAHA CORPORATION (1)
6,453,409 Digital signal processing system 5 1997
 
YONSEI UNIVERSITY INDUSTRY FOUNDATION (1)
7,886,097 Bus arbitration system, medium, and method 0 2007