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Abstract

A microprocessor device has an operand address register for storing an operand access address for an operand access, an access generation instruction address register for storing an access generation instruction address having caused the operand access and an operand data register for storing input/output data for the address indicated by the operand address. A multiplexer, whose operation is controlled by a selection signal provided from outside of the microprocessor, outputs the operand address or the access generation instruction address to an address pin of the microprocessor. An emulator device includes the above microprocessor device and a hold circuit, connected to the address pin in the microprocessor, for holding the data output from the microprocessor through the address pin. An address signal line is connected to the hold circuit. A trace memory stores the information transferred through the address pin as trace information during a real-time trace operation. A trace control circuit generates the selection signal and the hold signal to the hold circuit and generates a store signal. The hold circuit outputs the operand address to the address signal line when the hold signal and the selection signal are in the enable state.

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First Claim