Method and apparatus for designing the layout of a subcircuit in an integrated circuit
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 27, 1994
Issued Date -
N/A
app pub date -
Jan 21, 1992
filing date -
Apr 13, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method and apparatus for determining integrated circuit layouts of a random access memory (RAM) from a virtual circuit description and specification of a process technology. Starting with high-level descriptions of a circuit, a virtual geometric description of the circuit is developed in terms of reference points relative to a substrate surface. When the process technology is specified, the relationships among the reference points is determined, as in the layout of the RAM. These relationships account for variable sizing of circuit features and pitch matching of circuit features. A connectivity model and a simulation model of the RAM are also produced by the method and apparatus. These model can be used to verify that the RAM is connected as desired and has the desired performance.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully