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Abstract

A time-division multiplex switch (100) switches a hierarchy of data rates. It sets up higher-rate connections not as a plurality of individual lowest-rate connections but as one or more time slots in each one of a plurality of sequential frames (40, 50) that correspond to that higher rate in each superframe (30). A time-slot-interchange switching element (131, 141 ) of the switch utilizes a plurality of physically or logically distinct double-buffered data memories (301, 302, 303) each corresponding to a different one of the superframe and different-size ones of the frames. Reading and writing of each of the data memories' buffers alternates with the corresponding one of the superframe and different-size frames; reading of a data memory's buffer immediately follows writing of that buffer. Information from all incoming time slots is written into each one of the data memories, but only information corresponding to the data rate of an individual data memory's corresponding frame size is read that data memory into outgoing time slots. A control memory (305) maps memory locations of the data memories to output time slots. A corresponding control architecture in a switching element (1700) of a time-multiplexed switch (120)uses control memory (1701) that maps input ports to time slots of an output port.

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