Importance

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Abstract

A macrocell for use in programmable logic devices (PLDs) that provides for standard memory functions with minimum overhead circuitry. In a PLD that uses static random access memory (SRAM) as its configuration host, the circuit of the present invention enables the SRAM to be programmed via bidirectional look-up tables. In a user mode, macrocell bidirectional look-up table implements the configured logic, while in supervisor and memory modes the look-up table acts as an address decoder for the SRAM. A tristate buffer and two pass gates to direct data out of, and drive data into, the SRAM cells through the look-up table are the only additional circuitry required.

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First Claim