Threshold-based load balancing in ATM switches with parallel switch planes related applications
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United States of America Patent
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Oct 11, 1994
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N/A
app pub date -
Aug 17, 1993
filing date -
Aug 19, 1992
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Abstract
An asynchronous transfer mode switching system uses a parallel array of switching planes, distributors for distributing cells between the switching planes, and resequencers for collecting the cells after they have been switched. To balance the loads in the output buffers of the switching planes, each distributor includes two one-cell buffers and a load matrix. The load matrix stores the state of the output buffers in the switching planes, and this information is used to decide whether to send a cell arriving at the first of the one-cell buffers to its scheduled switching plane or to store the cell in the other of the one-cell buffers until either a switching plane with a lightly loaded output buffer for the cell's destination becomes available or another later arriving cell needs to be stored there.
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