Circuitry and method for suspending the automated erasure of a non-volatile semiconductor memory
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United States of America Patent
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Oct 11, 1994
Grant Date -
N/A
app pub date -
Feb 11, 1991
filing date -
Feb 11, 1991
priority date (Note) -
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Abstract
Circuitry for suspending an automated sequence for a nonvolatile semiconductor memory is described. The circuitry and memory reside on the same substrate. The circuitry includes a circuit for suspending erasure at a predetermined state of the erase sequence when a suspend signal is active and a circuit for resuming erasure at a predetermined state of the erase sequence when the suspend signal goes inactive. A method for suspending automated erasure sequence of a non-volatile semiconductor memory is also described. A suspend signal is received and erasure is suspended after a first erasure step of the erase sequence if suspend signal is active. Erasure resumes at a second erasure step of the erase sequence when the suspend signal goes inactive.
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